Saturn Launch Vehicle Digital Computer - Hardware

Hardware

The LVDC was capable of executing 12190 instructions per second. For comparison, a 2012-era microprocessor can execute 4 instructions per cycle at 3 GHz, achieving 12 billion instructions per second, one million times faster.

Its master clock ran at 2.048 MHz, but operations were performed bit-serially, with 4 cycles required to process each bit, 14 bits per phase, and 3 phases per instruction, for a basic time of 168 cycles = 82 μs for a simple add. (A few instructions, such as multiply or divide, took a few times this value.)

Memory was in the form of 13-bit "syllables", each with a 14th parity bit. Instructions were one syllable in size, while data words were two syllables (26 bits). Main memory was random access magnetic core, in the form of 4,096-word memory modules. Up to 8 modules provided a maximum of 32,768 words of memory. Ultrasonic delay lines provided temporary storage.

For reliability, the LVDC used triple-redundant logic and a voting system. The computer included three identical logic systems. Each logic system was split into a seven stage pipeline. At each stage in the pipeline, a voting system would take a majority vote on the results, with the most popular result being passed on to the next stage in all pipelines. This meant that, for each of the seven stages, one module in any one of the three pipelines could fail, and the LVDC would still produce the correct results. The result was an estimated reliability of 99.6% over 250 hours of operation, which was far more than the few hours required for an Apollo mission.

With four memory modules, giving a total capacity of 16,384 words, the computer weighed 72.5 lb (32.9 kg), was 29.5×12.5×10.5 inches in size (74×32×27 cm) and consumed 137 watts.