Quasi Delay Insensitive - Isochronic Fork

An isochronic fork is a concept in asynchronous digital design. Isochronic forks are forks in wires where if the acknowledging target has seen a transition on their end of the fork then the transition is assumed to have also happened on the other end of the fork too. There are two types of isochronic forks; the asymmetric types only ensure that the signal will reach the acknowledging fork tip before, or at the same time as, it will at the other fork tip, while the symmetric type ensures that both fork tips will be reached at the same time. Symmetrical isochronic forks allow either of the targets to acknowledge the signal. In quasi delay-insensitive (QDI) circuits all forks have to be either isochronic and acknowledged by one of the destinations, or acknowledged by all destinations. The concept of isochronic fork was introduced by A. J. Martin exactly to distinguish between asynchronous circuits that satisfy QDI requirements and those that do not. Martin also established that given reasonable assumptions on the kinds of circuit elements that are available to design with, it is impossible to design interesting systems without including at least some asynchronic forks. Isochronic forks are in some sense the weakest compromise away from fully delay-insensitive systems.