Common Features
PICs typically have a common set of registers: Interrupt Request Register (IRR), In-Service Register (ISR), Interrupt Mask Register (IMR). The IRR specifies which interrupts are pending acknowledgement, and is typically a symbolic register which can not be directly accessed. The ISR register specifies which interrupts have been acknowledged, but are still waiting for an End Of Interrupt (EOI). The IMR specifies which interrupts are to be ignored and not acknowledged. A simple register schema such as this allows up to two distinct interrupt requests to be outstanding at one time, one waiting for acknowledgement, and one waiting for EOI.
There are a number of common priority schemas in PICs including hard priorities, specific priorities, and rotating priorities.
Interrupts may be either edge triggered or level triggered.
There are a number of common ways of acknowledging an interrupt has completed when an EOI is issued. These include specifying which interrupt completed, using an implied interrupt which has completed (usually the highest priority pending in the ISR), and treating interrupt acknowledgement as the EOI.
Read more about this topic: Programmable Interrupt Controller
Famous quotes containing the words common and/or features:
“I set forth a humble and inglorious life; that does not matter. You can tie up all moral philosophy with a common and private life just as well as with a life of richer stuff. Each man bears the entire form of man’s estate.”
—Michel de Montaigne (1533–1592)
“Art is the child of Nature; yes,
Her darling child, in whom we trace
The features of the mother’s face,
Her aspect and her attitude.”
—Henry Wadsworth Longfellow (1807–1882)