Implementation
In a single-processor scenario, the CPU-to-northbridge link is point-to-point and the only real requirement is that it is fast enough to keep the CPU fed with data from memory.
When assessing the Pentium D, it is important to note that it is essentially two CPUs in the same package and that it will face the same bus contention issues as a pair of Xeons prior to the Dual Independent Bus architecture introduced with the Dual-Core Dempsey Xeons. To use a crude analogy one could say that instead of using a single cable between CPU and north bridge, one must use a Y-splitter. Leaving aside advanced issues such as cache coherency, each core can only use half of the 800 MT/s FSB bandwidth when under heavy load.
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