LSI-11
The LSI-11 (PDP-11/03), introduced in February, 1975 was the first PDP-11 model produced using large-scale integration; the entire CPU was contained on four LSI chips made by Western Digital (the MCP-1600 chip set; a fifth chip could be added to extend the instruction set, as pictured on the right). It used a bus which was a close variant of the Unibus called the LSI Bus or Q-Bus; it differed from the Unibus primarily in that addresses and data were multiplexed onto a shared set of wires, as opposed to having separate sets of wires, as in the Unibus. It also differed slightly in how it addressed I/O devices and it eventually allowed a 22-bit physical address (whereas the Unibus only allowed an 18-bit physical address) and block-mode operations for significantly improved bandwidth (which the Unibus did not support).
The CPU's microcode includes a debugger: firmware with a direct serial interface (RS-232 or current loop) to a terminal. This let the operator do debugging by typing commands and reading octal numbers, rather than operating switches and reading lights, the typical debugging method at the time. The operator could thus examine and modify the computer's registers, memory, and input/output devices, diagnosing and perhaps correcting failures in software and peripherals (unless a failure disabled the microcode itself). The operator could also specify which disk to boot from.
Both innovations increased the reliability and decreased the cost of the LSI-11.
Later Q-Bus based systems such as the LSI-11/23, /73, and /83 were based upon chip sets designed in house by Digital Equipment Corporation. Later PDP-11 Unibus systems were designed to use similar Q-Bus processor cards, using a Unibus adapter to support existing Unibus peripherals, sometimes with a special memory bus for improved speed.
There were other significant innovations in the Q-Bus lineup. For example, a system variant of the PDP-11/03 introduced full system Power-On Self-Test (POST).
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