Memory Refresh

Memory refresh is the process of periodically reading information from an area of computer memory, and immediately rewriting the read information to the same area without modification, for the purpose of preserving the information. Memory refresh is required in semiconductor dynamic random access memory (DRAM) and in fact is the defining characteristic of this class of memory. In a DRAM chip, each bit of memory data is stored as the presence or absence of an electric charge on a small capacitor on the chip. As time passes, the charges in the memory cells leak away, so without refresh the stored data would eventually be lost. To prevent this, external circuitry periodically reads each cell and rewrites it, restoring the charge on the capacitor to its original level. Each memory refresh cycle refreshes a succeeding area of memory cells, thus refreshing all the cells in a round-robin fashion. This process is conducted automatically, in the background, by the memory circuitry. While a refresh cycle is occurring the memory is not available for normal read and write operations, but in modern memory this "overhead" time is not large enough to significantly slow down memory operation.

Computer memory that does not require refreshing is available, called static random access memory (SRAM). SRAM circuits take up more room on the semiconductor chip, because each SRAM memory cell requires 4 - 6 transistors, compared to a single transistor and a capacitor for DRAM. For this reason the storage capacity of SRAM chips is much less than DRAM, so SRAM memory is more costly per bit. Therefore DRAM is used for the main memory in computers, video games, and most other large uses of semiconductor memory. The need for extra circuitry to perform memory refresh makes DRAM circuits and their timing significantly more complicated than SRAM circuits, but the great advantages of DRAM in density and cost justify this complexity.