Logic optimization, a part of logic synthesis, is the process of finding an equivalent representation of the specified logic circuit under one or more specified constraints. Generally the circuit is constrained to minimum chip area meeting a prespecified delay.
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Famous quotes containing the word logic:
“Our argument ... will result, not upon logic by itself—though without logic we should never have got to this point—but upon the fortunate contingent fact that people who would take this logically possible view, after they had really imagined themselves in the other man’s position, are extremely rare.”
—Richard M. Hare (b. 1919)