Logic optimization, a part of logic synthesis, is the process of finding an equivalent representation of the specified logic circuit under one or more specified constraints. Generally the circuit is constrained to minimum chip area meeting a prespecified delay.
Read more about Logic Optimization: Introduction, Two-level Versus Multi-level Representations
Famous quotes containing the word logic:
“... We need the interruption of the night
To ease attention off when overtight,
To break our logic in too long a flight,
And ask us if our premises are right.”
—Robert Frost (18741963)