Numerous other orderings, generically called middle-endian or mixed-endian, are possible. On the PDP-11 (16-bit little-endian) for example, the compiler stored 32-bit values with the 16-bit halves swapped from the expected little-endian order. This ordering is known as PDP-endian.
- storage of a 32-bit word on a PDP-11
increasing addresses → | |||||
0Bh | 0Ah | 0Dh | 0Ch |
The ARM architecture can also produce this format when writing a 32-bit word to an address 2 bytes from a 32-bit word alignment
Segment descriptors on Intel 80386 and compatible processors keep a base 32-bit address of the segment stored in little-endian order, but in four nonconsecutive bytes, at relative positions 2,3,4 and 7 of the descriptor start.
Read more about this topic: Little-endian, Examples of Storing The Value 0A0B0C0Dh in Memory