ICH
The first version of the ICH was released in June 1999 along with the Intel 810 northbridge. While its predecessor, the PIIX, was connected to the northbridge through an internal PCI bus with 133 MB/s, the ICH used a proprietary interface (called by Intel Hub Interface) that linked it to the northbridge through an 8-bit wide, 266 MB/s bus.
The Hub Interface was a point-to-point connection between different components on the motherboard. Another design decision was to substitute the rigid North-South axis on the motherboard with a star structure.
Note that, along with the ICH, Intel evolved other uses of the "Hub" terminology. Thus, the northbridge became the Memory Controller Hub (MCH) or if it had integrated graphics (e.g., Intel 810), the Graphics and Memory Controller Hub (GMCH).
Other ICH features include:
- PCI Rev 2.2 compliant with support for 33 MHz PCI operations.
- Advanced Configuration and Power Interface (ACPI) Support
- Integrated IDE controller for Ultra ATA support
- System Management Bus (SMBus) with support for I²C devices
- AC'97 2.1 Compliant Link
- Low Pin Count (LPC) interface
The ICH came in two flavors:
- 82801AA (ICH) - Ultra ATA/66 support, 6 PCI slots, Alert on LAN support
- 82801AB (ICH0) - Ultra ATA/33 support, 4 PCI slots, no Alert on LAN
Read more about this topic: I/O Controller Hub