Intel Paragon

The Intel Paragon was a series of massively parallel supercomputers produced by Intel. The Paragon XP/S was a productized version of the experimental Touchstone Delta system built at Caltech, launched in 1992. The Paragon superseded Intel's earlier iPSC/860 system, to which it was closely related.

The Paragon series was based around the Intel i860 RISC microprocessor. Up to 2048 (later, up to 4000) i860s were connected in a 2D grid. In 1993, an entry-level Paragon XP/E variant was announced with up to 32 compute nodes. The system architecture was a partitioned system, with the majority of the system comprising diskless compute nodes and a small number of I/O nodes interactive service nodes. Since the bulk of the nodes had no permanent storage, it was possible to "Red/Black switch" the compute partition from classified to unclassified by disconnecting one set of I/O nodes with classified disks and then connecting an unclassified I/O partition.

Intel intended the Paragon to run the OSF/1 AD distributed operating system on all processors. However, this was found to be inefficient in practice, and a light-weight kernel called SUNMOS was developed at Sandia National Laboratories to replace OSF/1 AD on the Paragon's compute processors.

The prototype for the Intel Paragon was the Intel Delta, built by Intel with funding from DARPA and installed operationally at the California Institute of Technology in the late 1980s with funding from the National Science Foundation. The Delta was one of the few computers to sit significantly above the curve of Moore's Law.


Read more about Intel Paragon:  Compute Nodes, I/O Nodes

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