FPGA Prototype - Design-for-Prototyping

Design-for-Prototyping

Many of the obstacles facing development teams who adopt FPGA prototypes can be distilled down to three "laws":

• SoCs are larger than FPGAs
• SoCs are faster than FPGAs
• SoC designs are FPGA-hostile

Putting a SoC design into an FPGA prototype requires careful planning in order to accomplish prototyping goals with minimal effort. To ease the development of the prototype, best practices called, Design-for-Prototyping (or DFP), influences both the SoC design style and the project procedures applied by design teams. Procedural recommendations include adding DFP conventions to RTL coding standards, employing a prototype compatible simulation environment, and instituting a system debug strategy jointly with the software team.