Instruction Set
Instructions and data are based on a 39-bit word length with binary representation in 2's complement arithmetic. The instruction set operates on a single address and single accumulator register, with an additional auxiliary register for double length integer multiply and divide. Although it is believed that the single length divide and square root instructions were only enabled in 803s destined for process control applications, the one remaining operational 803B has been found to have these instructions enabled, probably because it was used by a software house to develop real time and process control applications. An instruction is composed of a 6-bit instruction (conventionally represented in octal) and a 13 bit address. This gives 64 instructions organised as 8 groups of 8 instructions. The 13 bit memory address field gives an addressable range of 8192 words. These 19-bit instructions are packed two to a word with an additional 39th bit between them, the so-called B-line or B digit (the term is a legacy from the Ferranti Mark 1 computer, where the A-line represented the accumulator and the B-line an instruction modifier, both displayed on a Williams tube). Setting the B digit has the effect of adding the contents of the memory address of the first instruction to the second instruction at execution time, enabling indirect addressing and other run-time instruction modifications. The bit time is 6 microseconds, jumps execute in 288 microseconds and simple arithmetic instructions in 576 microseconds. Floating point operations take several milliseconds. IO is direct and there are no interrupts.
In the following descriptions, A and N represent the accumulator and the literal address, a and n represent the (initial) contents of the accumulator and addressed store location, and a' and n' the resultant contents.
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