Dynamic frequency scaling (also known as CPU throttling) is a technique in computer architecture whereby the frequency of a microprocessor can be automatically adjusted "on the fly," either to conserve power or to reduce the amount of heat generated by the chip. Dynamic frequency scaling is commonly used in laptops and other mobile devices, where energy comes from a battery and thus is limited. It is also used in quiet computing settings and to decrease energy and cooling costs for lightly loaded machines. Less heat output, in turn, allows the system cooling fans to be throttled down or turned off, reducing noise levels and further decreasing power consumption. It is also used for reducing heat in insufficiently cooled systems when the temperature reaches a certain threshold, such as in poorly cooled overclocked systems.
The dynamic power (switching power) dissipated by a chip is C·V2·f, where C is the capacitance being switched per clock cycle, V is voltage, and f is the switching frequency (as a unitless quantity). As frequency changes, the dynamic power will change linearly with it. Dynamic power does not account for the total power of the chip however, as there is also static power, which is primarily due to various leakage currents. Leakage current has become more and more important as feature sizes has become smaller and threshold levels lower. In state-of-the-art deep submicrometre technologies in 2008, dynamic power accounts for approximately two-thirds of the total chip power, which limits the effectiveness of frequency scaling.
Dynamic voltage scaling is another power conservation technique that is often used in conjunction with frequency scaling, as the frequency that a chip may run at is related to the operating voltage.
The efficiency of some electrical components, such as voltage regulators, decreases with increasing temperature, so the power used may increase with temperature. Since increasing power use may increase the temperature, increases in voltage or frequency may increase system power demands even further than the CMOS formula indicates, and vice-versa.
Read more about Dynamic Frequency Scaling: Performance Impact, Implementations
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