Cyrix Cx5x86 - Specifications

Specifications

• iDX4WB pinout, 168 pins
• Socket 3
• 2.0 million transistors on 0.65 micrometre process
• 144mm² die
• 3.45 volts
• 16 kilobytes unified level-one cache

100 MHz capable edition for 33 MHz (33×3), and 50 MHz (50×2) front side bus
100 MHz capable edition for 33 MHz (33×3), and 25 MHz (25×4) front side bus
120/133 MHz capable edition for 40 MHz (40×3) and 33 MHz (33×4) front side bus.