Operation
Referring to the schematic shown, the section marked in red forms the input stage and error amplifier. The inverting input (node where emitters of Q1 & Q2 are connected) is low-impedance and hence sensitive to changes in current. Resistors R1–R4 set up the quiescent bias conditions and are chosen such that the collector currents of Q1 & Q2 are the same. In most designs, active biasing circuitry is used instead of passive resistive biasing, and the non-inverting input may also be modified to become low impedance like the inverting input in order to minimise offsets.
With no signal applied, due to the current mirrors Q3/Q4 & Q5/Q6, the collector currents of Q4 and Q6 will be equal in magnitude if the collector currents of Q1 and Q2 are also equal in magnitude. Thus, no current will flow into the buffer's input (or equivalently no voltage will be present at the buffer's input). In practice, due to device mismatches the collector currents are unequal and this results in the difference flowing into the buffer's input resulting in an offset at its output. This is corrected by adjusting the input bias or adding offset nulling circuitry.
The section marked in blue (Q3–Q6) forms an I-to-V converter. Any change in the collector currents of Q1 and Q2 (as a result of a signal at the non-inverting input) appears as an equivalent change in the voltage at the junction of the collectors of Q4 and Q6. Cs is a stability capacitor to ensure that the circuit remains stable for all operating conditions. Due to the wide open-loop bandwidth of a CFA, there is a high risk of the circuit breaking into oscillations. Cs ensures that frequencies where oscillations might start are attenuated, especially when running with a low closed-loop gain.
The output stage (in magenta) is a buffer which provides current gain. It has a voltage gain of unity (+1 in the schematic).
Read more about this topic: Current-feedback Operational Amplifier
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