Cache invalidation is a process whereby entries in a cache are deleted. It can be done explicitly, as part of a cache coherence protocol in a parallel computer. In such a case, a compute node changes a variable and then invalidates the cached values of that variable across the rest of the computer system.
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Parallel computing
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| General |
- Cloud computing
- High-performance computing
- Cluster computing
- Distributed computing
- Grid computing
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| Levels |
- Bit
- Instruction
- Data
- Task
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| Threads |
- Superthreading
- Hyperthreading
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| Theory |
- Amdahl's law
- Gustafson's law
- Cost efficiency
- Karp–Flatt metric
- slowdown
- speedup
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| Elements |
- Process
- Thread
- Fiber
- PRAM
- Instruction window
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| Coordination |
- Multiprocessing
- Multithreading (computer architecture)
- Memory coherency
- Cache coherency
- Cache invalidation
- Barrier
- Synchronization
- Application checkpointing
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| Programming |
- Models
- Implicit parallelism
- Explicit parallelism
- Concurrency
- Flynn's taxonomy
- Thread (computer science)
- Non-blocking algorithm
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| Hardware |
- Multiprocessor
- Memory
- NUMA
- COMA
- distributed
- shared
- distributed shared
- SMT
- MPP
- Superscalar
- Vector processor
- Supercomputer
- Beowulf
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| APIs |
- Ateji PX
- POSIX Threads
- OpenMP
- OpenHMPP
- OpenACC
- PVM
- MPI
- UPC
- Intel Threading Building Blocks
- Intel Cilk Plus
- Boost.Thread
- Global Arrays
- Charm++
- Cilk
- Coarray Fortran
- OpenCL
- CUDA
- Dryad
- C++ AMP
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| Problems |
- Embarrassingly parallel
- Software lockout
- Scalability
- Race condition
- Deadlock
- Livelock
- Starvation
- Deterministic algorithm
- Parallel slowdown
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- Category: parallel computing
- Media related to parallel computing at Wikimedia Commons
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