I/O Signals
The signals used by BDM to communicate data to and from the target are initiated by the host processor. The host negates the transmission line, and then either
- Asserts the line sooner, to output a 1,
- Asserts the line later, to output a 0,
- Tri-states its output, allowing the target to drive the line. The host can sense a 1 or 0 as an input value.
At the start of the next bit time, the host negates the transmission line, and the process repeats. Each bit is communicated in this manner.
In other words the increasing complexity of today’s software and hardware designs is leading to some fresh approaches to debugging. Silicon manufacturers offer more and more on-chip debugging features for emulation of new processors.
This capability, implemented in various processors under such names as Background Debug Mode (BDM), JTAG and on-chip emulation, puts basic debugging functions on the chip itself. With a BDM (1 wire interface) or JTAG (standard JTAG) debug port, you control and monitor the microcontroller solely through the stable on-chip debugging services.
This debugging mode runs even when the target system crashes and enables developers to continue investigating the cause of the crash.
Read more about this topic: Background Debug Mode Interface
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